Abstract image representing MAPT chapter 7

Advanced Packaging and Heterogeneous Integration

Advanced Packaging and Heterogeneous Integration

Chapter 7 (Advanced Packaging and Heterogeneous Integration) focuses on various aspects of advanced packaging and heterogeneous integration of microelectronic chips. As the cost advantage of shrinking the die using finer transistor nodes (below 20nm) is diminishing, a new approach is necessary, which is to disaggregate a monolithic die into smaller chiplets cost-effectively fabricated on appropriate technology nodes. To enable functional scaling through heterogenous integration (HI) of the chiplets and passive components, the package must transition from a chip carrier/encapsulation to an integration platform. The proliferation of chiplets will continue as industry drives towards higher performance lower power solutions that are customized for each application. The next generation of packaging technology needs to support this explosion in heterogeneous integration by enabling interconnects that accommodate very fine pitch I/O die and very fine lines/spaces circuitry.

Advanced Packaging and Heterogeneous Integration

Chapter contributors

Griselda Bonilla (IBM) – Chair
Henning Braunisch (Intel) – Vice Chair
Ganesh Subbarayan (Purdue University) – Vice Chair
Amit Agrawal (NIST)
Bilal Akin (UT- Dallas)
David Bergman (IPC)
Kirk Bresniker (Hewlett Packard Enterprise)
Yu (Kevin) Cao (Arizona State University)
Abjhit Chatterjee (Georgia Tech)
Aiping Chen (LANL)
Gary Chen (TSMC)
Promod Chowdhury (IBM)
Bob Conner (3D Glass Solutions)
Josh Conway (America’s Frontier Fund)
Mike Delaus (Analog Devices)
Patrice Ducharme (IBM)
Jeb Flemming (3D Glass Solutions)
John T. Heron (University of Michigan)
Tengfei Jiang (University of Central Florida)
Dan Jiao (Purdue University)
Dae Young Jung (SUNY Binghamton)
Pikyu Kang (Samsung)

Zia Karim (Yield Engineering Systems)
Jason Kawasaki (UW-Madison)
Matt Kelly (IPC)
Jong-Hoon Kim (SK hynix)
Walter Kocon (GlobalFoundries)
Michel Koopmans (Micron)
Deepak Kulkarni (AMD)
Gilles Lamant (Cadence)
David Landsman (Western Digital)
Thomas LeBrun (NIST)
Timothy Lee (Boeing)
Heejin Lee (SK hynix)
Sung-Kyu Lim (Georgia Tech)
Ravi Mahajan (Intel)
Babu Mandava (3D Glass Solutions)
Varughese Mathew (NXP)
Andrew Mawer (NXP)
Rajiv Mongia (Intel)
Benoit Montreuil (Georgia Tech)
Kwangjin Moon (Samsung)
John Oakley (SRC)
Valérie Oberson (IBM)
Kunal R. Parekh (Micron)

John Park (Cadence)
Mark Poliks (SUNY Binghamton)
Kaladhar Radhakrishnan (Intel)
Gnyaneshwar Ramakrishna (Cisco)
Urmi Ray (iNEMI)
Sathya Raghavan (IBM)
Sadasivan Shankar (SLAC Nat’l Lab)
Ravi Shenoy (Qualcomm)
Akshay Singh (Micron)
Suresh Sitaraman (Georgia Tech)
Spyridon Skordas (IBM)
Ilseok Son (TEL)
Eric Tervo (UW-Madison)
Sharad Vidyarthy (Analog Devices)
Chip White (Georgia Tech)
Glen Wilk (ASM)
Brett Wilkerson (AMD)
Jaimal Williamson (Texas Instruments)
Charles G. Woychik (Skywater Technologies)
Jinkyoung Yoo (LANL)
SeHo You (Samsung)
Katie C. Yu (NXP)
Ming Zhang (PDF Solutions)