Abstract image representing MAPT chapter 3

Security and Privacy

Security and Privacy

Chapter 3 (Security and Privacy) identifies emerging security and privacy challenges and outlines approaches to address them. The entire technology stack is analyzed holistically, but we emphasize implications for manufacturing and packaging technologies. This crosscut chapter is complementary to the security chapter of the Heterogeneous Integration Roadmap [5]. The main topics of this chapter include: (i) potential hardware security vulnerabilities in heterogeneous integration; (ii) feasible strategies to identify security aspects for SiP and define fair metrics evaluating the security resilience of implementations; and (iii) attack predictions and defense mechanisms for specific applications.

5 Heterogeneous Integration Roadmap (HIR), Chapter 19: Security https://eps.ieee.org/images/files/HIR_2019/HIR1_ch19_security.pdf

Chapter contributors

Richard Chow (Intel) – Chair
Farimah Farahmandi (University of Florida) – Vice Chair
Sohrab Aftabjahani (Intel)
Navid Asadi (University of Florida)
Asif Bhatti (America’s Frontier Fund)
Krishnendu Chakrabarty (Arizona State University)

Amitabh Das (AMD)
Kassem Fawaz (University of Wisconsin)
Kanad Ghose (SUNY Binghamton)
Brett Goldsmith (Paragraf)
Ahmed Hussein (University of Guelph)
Farinaz Koushanfar (UCSD)
Prabhat Mishra (University of Florida)
Subhasish Mitra (Stanford University)

Christian Peters (Bosch)
Umit Sami (Memcus)
Naomi Schwartz (MedCrypt)
Mark Tehranipoor (University of Florida)
Eric Van Hensbergen (Arm)
Axel Wirth (MedCrypt)
Tao Zhang (University of Florida)